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lt3973/lt3973-3.3/lt3973-5 1 3973fa typical a pplica t ion descrip t ion 42v, 750ma step-down regulator with 2.5a quiescent current and integrated diodes the lt ? 3973 is an adjustable frequency monolithic buck switching regulator that accepts a wide input voltage range up to 42v, and consumes only 2.5a of quiescent current. a high effciency switch is included on the die along with the catch diode, boost diode, and the necessary oscillator, control and logic circuitry. low ripple burst mode operation maintains high effciency at low output currents while keep- ing the output ripple below 10mv in a typical application. a minimum dropout voltage of 530mv is maintained when the input voltage drops below the programmed output volt- age, such as during automotive cold crank. current mode topology is used for fast transient response and good loop stability. a catch diode current limit provides protection against shorted outputs and overvoltage conditions, with thermal shutdown providing additional fault protection. an accurate programmable undervoltage lockout feature is available, producing a low shutdown current of 0.75a. a power good fag signals when v out reaches 90% of the programmed output voltage. the lt3973 is available in small, thermally enhanced 10-lead msop and 3mm 3mm dfn packages. l , lt, ltc, ltm, linear technology, the linear logo and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 5v step-down converter fea t ures a pplica t ions n ultralow quiescent current 2.5a i q at 12v in to 3.3v out n low ripple burst mode ? operation output ripple < 10mv p-p n wide input voltage range: 4.2v to 42v operating n adjustable switching frequency: 200khz to 2.2mhz n integrated boost and catch diodes n 750ma output current n excellent start-up and dropout performance n fixed output voltages: 3.3v , 5v 1.9a i q at 12v in n accurate programmable undervoltage lockout n low shutdown current: i q = 0.75a n internal catch diode current limit n power good flag n thermal shutdown n small, thermally enhanced 10-lead msop and (3mm 3mm) dfn packages n automotive battery regulation n power for portable products n industrial supplies n gate drive bias v in boost lt3973 sw en/uvlo pg rt c3 0.47f 15pf c2 22f c1 4.7f v in 5.6v to 42v v out 5v 750ma 1m 316k 215k f = 600khz l1 15h bd out fb gnd off on 3973 ta01a effciency load current (ma) 0.01 40 efficiency (%) power loss (mw) 80 70 60 50 90 100 0.1 1 3973 ta01b 10 0.01 10 100 1 0.1 1000 v in = 12v
lt3973/lt3973-3.3/lt3973-5 2 3973fa v in , en/uvlo voltage ............................................... 42v boost pin voltage ................................................... 55v boost pin above sw pin ......................................... 25v fb/v out , rt, pg voltage .............................................. 6v bd voltage ................................................................ 25v out v oltage .............................................................. 14v (note 1) o r d er i n f orma t ion lead free finish tape and reel part marking* package description temperature range lt3973edd#pbf lt3973edd#trpbf lgch 10-lead (3mm 3mm) plastic dfn C40c to 125c lt3973idd#pbf lt3973idd#trpbf lgch 10-lead (3mm 3mm) plastic dfn C40c to 125c lt3973hdd#pbf lt3973hdd#trpbf lgch 10-lead (3mm 3mm) plastic dfn C40c to 150c lt3973ems#pbf lt3973emse#trpbf ltfys 10-lead plastic msop C40c to 125c lt3973ims#pbf lt3973imse#trpbf ltfys 10-lead plastic msop C40c to 125c lt3973hms#pbf lt3973hms#trpbf ltfys 10-lead plastic msop C40c to 150c lt3973emse-3.3#pbf lt3973emse-3.3#trpbf ltggb 10-lead plastic msop C40c to 125c lt3973imse-3.3#pbf lt3973imse-3.3#trpbf ltggb 10-lead plastic msop C40c to 125c lt3973hmse-3.3#pbf lt3973hmse-3.3#trpbf ltggb 10-lead plastic msop C40c to 150c lt3973edd-3.3#pbf lt3973edd-3.3#trpbf lggc 10-lead (3mm 3mm) plastic dfn C40c to 125c lt3973idd-3.3#pbf lt3973idd-3.3#trpbf lggc 10-lead (3mm 3mm) plastic dfn C40c to 125c lt3973hdd-3.3#pbf lt3973hdd-3.3#trpbf lggc 10-lead (3mm 3mm) plastic dfn C40c to 150c lt3973emse-5#pbf lt3973emse-5#trpbf ltggd 10-lead plastic msop C40c to 125c lt3973imse-5#pbf lt3973imse-5#trpbf ltggd 10-lead plastic msop C40c to 125c lt3973hmse-5#pbf lt3973hmse-5#trpbf ltggd 10-lead plastic msop C40c to 150c a bsolu t e m aximum r a t ings top view 11 gnd dd package 10-lead (3mm 3mm) plastic dfn 10 9 6 7 8 4 5 3 2 1 rt pg bd boost sw *fb/v out out en/uvlo v in gnd ja = 40c/w, jc = 5c/w exposed pad (pin 11) is gnd, must be soldered to pcb 1 2 3 4 5 *fb/v out out en/uvlo v in gnd 10 9 8 7 6 rt pg bd boost sw top view ms package 10-lead plastic msop 11 gnd ja = 45c/w, jc = 10c/w exposed pad (pin 11) is gnd, must be soldered to pcb * fb for lt3973, v out for lt3973-3.3, lt3973-5. p in c on f igura t ion operating junction temperature range (note 2) l t3973e/lt3973e-x ........................... C40c to 125c l t3973i/lt3973i-x ............................ C40c to 125c l t3973h/lt3973h-x .......................... C40c to 150c storage t emperature range ................... C65c to 150c lead t emperature (soldering, 10 sec) ms only ............................................................ 300c
lt3973/lt3973-3.3/lt3973-5 3 3973fa e lec t rical c harac t eris t ics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c. v in = 12v, v bd = 3.3v unless otherwise noted. (note 2) parameter conditions min typ max units minimum input voltage (note 3) l 3.8 4.2 v quiescent current from v in v en/uvlo low v en/uvlo high v en/uvlo high, C40c to 125c v en/uvlo high, C40c to 150c l l 0.75 1.8 1.3 2.8 6 12 a a a a lt3973 feedback voltage l 1.195 1.185 1.21 1.21 1.225 1.235 v v lt3973-3.3 output voltage l 3.26 3.234 3.3 3.3 3.34 3.366 v v lt3973-5 output voltage l 4.94 4.9 5 5 5.06 5.1 v v lt3973 fb pin bias current (note 3) v fb = 1.21v l 0.1 20 na fb/output voltage line regulation 4.2v < v in < 40v 0.0002 0.01 %/v fb pin bias current l 0.1 20 na fb voltage line regulation 4.2v < v in < 40v 0.0002 0.01 %/v switching frequency r t = 41.2k, v in = 6v r t = 158k, v in = 6v r t = 768k, v in = 6v 1.72 632 156 2.15 790 195 2.58 948 234 mhz khz khz switch current limit v in = 5v, v fb = 0v l 1.237 1.65 1.98 a catch schottky current limit v in = 5v l 0.92 1.15 1.44 a switch v cesat i sw = 500ma 250 mv switch leakage current 0.05 2 a catch schottky forward voltage i sch = 200ma, v in = v bd = nc 550 mv catch schottky reverse leakage v sw = 12v 0.05 2 a boost schottky forward voltage i sch = 50ma, v in = nc, v boost = 0v 820 mv boost schottky reverse leakage v reverse = 12v 0.02 2 a minimum boost voltage (note 4) v in = 5v l 1.4 1.8 v boost pin current i sw = 500ma, v boost = 15v 10 13 ma dropout comparator threshold (v in - out) falling, v in = 5v l 400 490 580 mv dropout comparator hysteresis 40 mv en/uvlo pin current v en/uvlo = 12v 1 30 na en/uvlo voltage threshold en/uvlo falling, v in 4.2v l 1.09 1.16 1.23 v lead free finish tape and reel part marking* package description temperature range lt3973edd-5#pbf lt3973edd-5#trpbf lggf 10-lead (3mm 3mm) plastic dfn C40c to 125c lt3973idd-5#pbf lt3973idd-5#trpbf lggf 10-lead (3mm 3mm) plastic dfn C40c to 125c lt3973hdd-5#pbf lt3973hdd-5#trpbf lggf 10-lead (3mm 3mm) plastic dfn C40c to 150c consult ltc marketing for parts specifed with wider operating temperature ranges. *the temperature grade is identifed by a label on the shipping container. consult ltc marketing for information on non-standard lead based fnish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifcations, go to: http://www.linear.com/tapeandreel/ o r d er i n f orma t ion
lt3973/lt3973-3.3/lt3973-5 4 3973fa note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt3973e is guaranteed to meet performance specifcations from 0c to 125c junction temperature. specifcations over the C40c to 125c operating junction temperature range are assured by design, characterization, and correlation with statistical process controls. the lt3973i is guaranteed over the full C40c to 125c operating junction temperature range. the lt3973h is guaranteed over the full C40c to 150c operating junction temperature range. high junction temperatures degrade operating lifetimes. operating lifetime is derated at junction temperatures greater than 125c. the junction temperature (t j , in c) is calculated from the ambient temperature (t a in c) and power dissipation (pd, in watts) according to the formula: t j = t a + (pd ? ja ) where ja (in c/w) is the package thermal impedance. note 3: this is the minimum input voltage for operation with accurate fb reference voltage. note 4: this is the minimum voltage across the boost capacitor needed to guarantee full saturation of the switch. note 5: the lt3973 contains circuitry that extends the maximum duty cycle if there is suffcient voltage across the boost capacitor. see the application information section for more details. note 6: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed the maximum operating junction temperature when overtemperature protection is active. continuous operation above the specifed maximum operating junction temperature may impair device reliability or permanently damage the device. en/uvlo voltage threshold en/uvlo rising, v in 4.2v l 1.12 1.19 1.28 v en/uvlo voltage hysteresis 30 45 mv pg threshold offset from feedback voltage v fb rising 6.5 10 13.5 % pg hysteresis as % of output voltage 0.8 % pg leakage v pg = 3v 0.01 1 a pg sink current v pg = 0.4v l 220 350 a minimum switch on-time 70 ns minimum switch off-time (note 5) v in = 10v 130 180 ns e lec t rical c harac t eris t ics the l denotes the specifcations which apply over the full operating temperature range, otherwise specifcations are at t a = 25c. v in = 12v, v bd = 3.3v unless otherwise noted. (note 2)
lt3973/lt3973-3.3/lt3973-5 5 3973fa typical p er f ormance c harac t eris t ics lt3973-3.3 output voltage no-load supply current lt3973 feedback voltage effciency, v out = 3.3v effciency, v out = 3.3v effciency, v out = 5v effciency, v out = 5v t a = 25c, unless otherwise noted. load current (a) 50 efficiency (%) 60 70 80 90 0 0.5 0.6 0.3 0.4 0.7 3973 g01 20 40 30 0.1 0.2 v in = 12v v in = 24v v in = 36v front page application v out = 3.3v r1 = 1m r2 = 576k load current (a) 50 efficiency (%) 60 70 80 90 0 0.5 0.6 0.7 3973 g02 30 40 0.1 0.2 0.3 0.4 v in = 12v v in = 24v v in = 36v front page application load current (ma) 50 efficiency (%) 60 70 80 90 0.01 100 10 3973 g03 20 40 30 0.1 1 v in = 12v v in = 24v v in = 36v front page application v out = 3.3v r1 = 1m r2 = 576k load current (ma) 50 efficiency (%) 60 70 80 90 0.01 100 3973 g04 30 40 0.1 1 10 v in = 12v v in = 24v v in = 36v front page application no-load supply current lt3973-5 output voltage temperature (c) ?50 feedback voltage (v) 1.210 1.215 1.220 25 75 150 3973 g05 1.205 1.200 1.195 ?25 0 50 100 125 temperature (c) ?50 output voltage (v) 3.30 3.31 3.32 25 75 150 3973 g06 3.29 3.28 3.27 ?25 0 50 100 125 temperature (c) ?50 output voltage (v) 5.00 5.02 5.04 25 75 150 3973 g07 4.98 4.96 4.94 ?25 0 50 100 125 input voltage (v) 1.5 supply current (a) 2.0 2.5 3.0 1510 25 40 3973 g08 3.5 4.0 5 20 30 35 front page application v out = 3.3v r1 = 1m r2 = 576k lt3973-3.3 temperature (c) ?50 supply current (a) 20 15 30 25 35 25 75 150 3973 g09 10 5 0 ?25 0 50 100 125 front page application v in = 12v v out = 3.3v r1 = 1m r2 = 576k
lt3973/lt3973-3.3/lt3973-5 6 3973fa typical p er f ormance c harac t eris t ics maximum load current maximum load current maximum load current load regulation t a = 25c, unless otherwise noted. switch current limit switch current limit switching frequency minimum switch on-time switch v cesat (i sw = 500ma) vs temperature input voltage (v) 5 0 load current (a) 0.2 0.4 1.6 1.4 1.2 1.0 0.8 0.6 1510 20 25 30 35 40 3973 g10 45 front page application v out = 3.3v typical minimum input voltage (v) 5 10 0 load current (a) 0.3 0.6 1.5 1.2 0.9 15 20 30 40 25 35 3973 g11 45 front page application v out = 5v typical minimum temperature (c) ?50 load current (a) 0.8 1.0 1.2 1.4 25 75 3973 g12 0.6 0.4 0.2 0 ?25 0 50 100 125 150 front page application v in = 12v v out = 5v limited by maximum junction temperature; ja = 45c/w limited by current limit h-grade load current (ma) 0 load regulation (%) 0.15 300 3973 g13 0 ?0.10 100 200 400 ?0.15 ?0.20 0.25 0.20 0.10 0.05 ?0.05 500 600 700 front page application referenced from v out at 100ma load duty cycle (%) 0 0.8 switch current limit (a) 1.0 1.2 1.4 1.6 1.8 2.0 20 40 60 80 3973 g14 100 switch peak current limit catch diode valley current limit temperature (c) ?50 0.8 switch current limit (a) 1.0 1.2 1.4 1.6 0 50 100 150 3973 g15 1.8 2.0 ?25 25 75 125 switch peak current limit catch diode valley current limit temperature (c) ?50 0 frequency (mhz) 0.4 0.8 1.2 1.6 2.4 ?25 0 25 50 75 3973 g16 100 125 150 2.0 0.2 0.6 1.0 1.4 2.2 1.8 temperature (c) ?50 0 switch on-time (ns) 25 75 150 0 50 75 3973 g17 50 125 100 ?25 25 100 125 150 load current = 375ma temperature (c) ?50 200 switch v cesat (mv) 250 300 350 ?25 0 25 50 3973 g18 75 100 125 150
lt3973/lt3973-3.3/lt3973-5 7 3973fa typical p er f ormance c harac t eris t ics t a = 25c, unless otherwise noted. catch diode forward voltage boost diode forward voltage v fb regulation voltage minimum input voltage to switch minimum input voltage, v out = 3.3v minimum input voltage, v out = 5v start-up and dropout performance boost pin current switch v cesat switch current (ma) 0 0 switch v cesat (mv) 100 200 300 400 500 600 200 400 600 800 1000 3973 g19 1200 switch current (ma) 0 15 20 25 800 1000 3973 g20 10 200 400 600 1200 5 0 boost pin current (ma) load current (ma) 0 100 2.5 input voltage (v) 3.5 5.0 200 400 500 3973 g21 3.0 4.5 4.0 300 600 700 to start/to run front page application v out = 3.3v load current (ma) 0 100 4.0 input voltage (v) 5.0 6.5 200 400 500 3973 g22 4.5 6.0 5.5 300 600 700 to start/to run front page application v out = 5v time voltage (v) 6 7 9 8 5 3973 g23 4 3 2 1 0 front page application v in v out temperature (c) 3.5 input voltage (v) 4.0 ?50 100 125 25 7550 150 3973 g24 2.0 3.0 2.5 ?25 0 input voltage (v) 1.2 v fb (v) 1.4 2.0 4.0 4.5 3.53.0 5.0 3973 g25 0.6 1.0 0.8 2.5 boost diode current (ma) 0 0 boost diode v f (v) 0.2 0.4 0.6 0.8 1.0 1.2 50 100 150 200 3973 g26 150c 125c 25c ?50c catch diode current (ma) 0 catch diode, v f (v) 0.4 0.6 1200 3973 g27 0.2 0 200 400 600 800 1000 1.0 0.8 150c 125c 25c ?50c
lt3973/lt3973-3.3/lt3973-5 8 3973fa switching waveforms, burst mode operation switching waveforms, full frequency continuous operation power good threshold en/uvlo threshold catch diode leakage transient load response; load current is stepped from 50ma (burst mode operation) to 300ma transient load response; load current is stepped from 250ma to 500ma typical p er f ormance c harac t eris t ics t a = 25c, unless otherwise noted. temperature (c) ?50 catch diode leakage (a) 150 200 250 25 75 150 3973 g28 100 50 0 ?25 0 50 100 125 v r = 12v temperature (c) ?50 88 threshold (%) 89 90 91 92 ?25 0 25 50 3973 g29 75 100 125 150 temperature (c) ?50 1.145 threshold voltage (v) 1.170 1.195 1.220 1.245 ?25 0 25 50 3973 g30 75 100 125 150 en/uvlo rising v out 100mv/div i l 200ma/div 50s/div front page application v in = 12v v out = 5v 3973 g31 v out 100mv/div i l 200ma/div 50s/div front page application v in = 12v v out = 5v 3973 g32 v out 10mv/div v sw 5v/div i l 200ma/div 5s/div front page application v in = 12v v out = 5v i load = 15ma f = 600khz 3973 g33 v out 5mv/div v sw 5v/div i l 200ma/div 1s/div front page application v in = 12v v out = 5v i load = 750ma f = 600khz 3973 g34
lt3973/lt3973-3.3/lt3973-5 9 3973fa p in func t ions fb (pin 1, lt3973 only): the lt3973 regulates the fb pin to 1.21v. connect the feedback resistor divider tap to this pin. v out (pin 1, lt3973-3.3 and lt3973-5 only): the lt3973-3.3 and lt3973-5 regulate the v out pin to 3.3v and 5v, respectively. this pin connects to the internal feedback divider that programs the fxed output voltage. out (pin 2): the lt3973 regulates the v in to v out voltage for dropout conditions. it will also pull current from this pin to charge the boost capacitor when needed. connect this pin to the output. if programmed output is greater than 14v, tie this pin to gnd. en/uvlo (pin 3): the part is in shutdown when this pin is low and active when this pin is high. the threshold voltage is 1.19v going up with 30mv of hysteresis. tie to v in if shutdown feature is not used. the en/uvlo threshold is accurate only when v in is above 4.2v. if v in is lower than 4.2v, ground en/uvlo to place the part in shutdown. v in (pin 4): the v in pin supplies current to the lt3973s internal circuitry and to the internal power switch. this pin must be locally bypassed. gnd (pin 5, exposed pad pin 11): ground. the exposed pad must be soldered to the pcb. sw (pin 6): the sw pin is the output of an internal power switch. connect this pin to the inductor. boost (pin 7): this pin is used to provide a drive volt- age, higher than the input voltage, to the internal bipolar npn power switch. bd (pin 8): this pin connects to the anode of the boost diode. this pin also supplies current to the lt3973s internal regulator when bd is above 3.2v. pg (pin 9): the pg pin is the open-drain output of an internal comparator. pg remains low until the fb pin is within 10% of the fnal regulation voltage. pg is valid when v in is above 4.2v and en/uvlo is high. rt (pin 10): a resistor is tied between rt and ground to set the switching frequency.
lt3973/lt3973-3.3/lt3973-5 10 3973fa b lock diagram r switch latch d boost d catch boost oscillator 200khz to 2.2mhz slope comp s q ? + ? + ? + burst mode detect error amp 1.09v shdn en/uvlo 1.21v c1 v in internal 1.21v ref ? + rt r t pg fb r2 r1 v c v out gnd lt3973 only v in bd out sw v out c2 c3 3973 bd l1 ? + + ? r2 r1 lt3973-3.3 and lt3973-5 only* * lt3973-3.3: r1 = 12.72m, r2 = 7.39m lt3973-5: r1 = 15.23m, r2 = 4.88m
lt3973/lt3973-3.3/lt3973-5 11 3973fa o pera t ion the lt3973 is a constant frequency, current mode step- down regulator. an oscillator, with frequency set by rt, sets an rs fip-fop, turning on the internal power switch. an amplifer and comparator monitor the current fowing between the v in and sw pins, turning the switch-off when this current reaches a level determined by the voltage at v c (see block diagram). an error amplifer measures the output voltage through an external resistor divider tied to the fb pin and servos the v c node. if the error amplifers output increases, more current is delivered to the output; if it decreases, less current is delivered. another comparator monitors the current fowing through the catch diode and reduces the operating frequency when the current exceeds the 1.15a bottom current limit. this foldback in frequency helps to control the output current in fault conditions such as a shorted output with high input voltage. maximum deliverable current to the output is therefore limited by both switch current limit and catch diode current limit. an internal regulator provides power to the control cir - cuitry. the bias regulator normally draws power from the v in pin, but if the bd pin is connected to an external voltage higher than 3.2v, bias power will be drawn from the external source (typically the regulated output voltage). this improves effciency. if the en/uvlo pin is low, the lt3973 is shut down and draws 0.75a from the input. when the en/uvlo pin exceeds 1.19v, the switching regulator will become active. under - voltage lockout is programmable via this pin. the switch driver operates from either v in or from the boost pin. an external capacitor is used to generate a voltage at the boost pin that is higher than the input supply. this allows the driver to fully saturate the internal bipolar npn power switch for effcient operation. to further optimize effciency, the lt3973 automatically switches to burst mode operation in light load situations. between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to 1.8a. if the input voltage decreases towards the programmed output voltage, the lt3973 will start to skip switch-off times and decrease the switching frequency to maintain output regulation up to a maximum duty cycle of approximately 97.5%. when the out pin is tied to v out , the lt3973 regulates the output such that it stays more than 530mv below v in ; this sets a minimum dropout voltage. this enforced minimum dropout voltage limits the duty cycle and keeps the boost capacitor charged during dropout conditions. since suffcient boost voltage is maintained, the internal switch can fully saturate yielding good dropout performance. the lt3973 contains a power good comparator which trips when the fb pin is at 90% of its regulated value. the pg output is an open-drain transistor that is off when the output is in regulation, allowing an external resistor to pull the pg pin high. power good is valid when the lt3973 is enabled and v in is above 4.2v.
lt3973/lt3973-3.3/lt3973-5 12 3973fa a pplica t ions i n f orma t ion fb resistor network the output voltage is programmed with a resistor divider between the output and the fb pin. choose the 1% resis- tors according to: r1 = r2 v out 1.21 C 1 ? ? ? ? ? ? reference designators refer to the block diagram. note that choosing larger resistors will decrease the quiescent current of the application circuit. setting the switching frequency the lt3973 uses a constant frequency pwm architecture that can be programmed to switch from 200khz to 2.2mhz by using a resistor tied from the rt pin to ground. a table showing the necessary r t value for a desired switching frequency is in table 1. table 1. switching frequency vs r t value switching frequency (mhz) r t value (k) 0.2 0.3 0.4 0.5 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 732 475 340 267 215 150 115 90.9 73.2 61.9 51.1 43.2 36.5 operating frequency trade-offs selection of the operating frequency is a trade-off between effciency, component size, and maximum input volt - age. the advantage of high frequency operation is that smaller inductor and capacitor values may be used. the disadvantages are lower effciency, and narrower input voltage range at constant-frequency. the highest accept - able switching frequency (f sw(max) ) for a given application can be calculated as follows: f sw(max) = v out + v d t on(min) v in C v sw + v d ( ) where v in is the typical input voltage, v out is the output voltage, v d is the integrated catch diode drop (~0.7v), and v sw is the internal switch drop (~0.5v at max load). this equation shows that slower switching frequency is necessary to accommodate high v in /v out ratio. this is due to the limitation on the lt3973s minimum on-time. the minimum on-time is a strong function of temperature. use the minimum switch on-time curve (see typical per - formance characteristics) to design for an applications maximum temperature, while adding about 30% for part-to-part variation. the minimum duty cycle that can be achieved taking this on-time into account is: dc min = t on(min) ? f sw where f sw is the switching frequency, and the t on(min) is the minimum switch on-time. a good choice of switching frequency should allow ad- equate input voltage range (see next two sections) and keep the inductor and capacitor values small. minimum input voltage range the minimum input voltage for regulation is determined by either the lt3973s minimum operating voltage of 4.2v, its maximum duty cycle, or the enforced minimum drop - out voltage. see the typical performance characteristics section for the minimum input voltage across load for outputs of 3.3v and 5v. the duty cycle is the fraction of time that the internal switch is on during a clock cycle. unlike many fxed fre- quency regulators, the lt3973 can extend its duty cycle by remaining on for multiple clock cycles. the lt3973 will not switch off at the end of each clock cycle if there is suffcient voltage across the boost capacitor (c3 in the block diagram). eventually, the voltage on the boost capacitor falls and requires refreshing. when this occurs, the switch will turn off, allowing the inductor current to recharge the boost capacitor. this places a limitation on the maximum duty cycle as follows: dc max = 1/(1+1/ sw ) where sw is equal to the sw pin current divided by the boost pin current (see the typical performance characteristics section), generally leading to a dc max of
lt3973/lt3973-3.3/lt3973-5 13 3973fa a pplica t ions i n f orma t ion about 97.5%. this leads to a minimum input voltage of approximately: v in(min1) = v out + v d dc max C v d + v sw where v out is the output voltage, v d is the catch diode drop (~0.7v), v sw is the internal switch drop (~0.5v at max load), and dc max is the maximum duty cycle. the fnal factor affecting the minimum input voltage is the minimum dropout voltage. when the out pin is tied to v out , the lt3973 regulates the output such that it stays more than 530mv below v in . this enforced minimum dropout voltage is due to reasons that are covered in a later section. this places a limitation on the minimum input voltage as follows: v in(min2) = v out + v dropout(min) where v out is the output voltage and v dropout(min) is the minimum dropout voltage (530mv). combining these factors leads to the overall minimum input voltage: v in(min) = max(v in(min1) , v in(min2) , 4.2v) note that the lt3973 will begin switching at a lower input voltage (typically 3v) but will regulate to a lower fb voltage in this region of operation (see the typical performance characteristics section). maximum input voltage range the highest allowed v in during normal operation (v in(op- max) ) is limited by minimum duty cycle and can be calcu- lated by the following equation: v in(op-max) = v out + v d f sw ? t on(min) C v d + v sw where t on(min) is the minimum switch on time. however, the circuit will tolerate inputs up to the absolute maximum ratings of the v in and boost pins, regardless of chosen switching frequency. during such transients where v in is higher than v in(op-max) , the switching frequency will be reduced below the programmed frequency to prevent damage to the part. the output voltage ripple and inductor current ripple may also be higher than in typical operation, however the output will still be in regulation. inductor selection for a given input and output voltage, the inductor value and switching frequency will determine the ripple current. the ripple current increases with higher v in or v out and decreases with higher inductance and faster switching frequency. a good starting point for selecting the induc - tor value is: l = 1.5 v out + v d f sw where v d is the voltage drop of the catch diode (~0.7v), l is in h and f sw is in mhz. the inductors rms current rating must be greater than the maximum load current and its saturation current should be about 30% higher. for robust operation in fault conditions (start-up or short circuit) and high input voltage (>30v), the saturation cur - rent should be above 1.5a. to keep the effciency high, the series resistance (dcr) should be less than 0.1, and the core material should be intended for high frequency applications. table 2 lists several inductor vendors. table 2. inductor vendors vendor url coilcraft www.coilcraft.com sumida www.sumida.com toko www.tokoam.com wrth elektronik www.we-online.com coiltronics www.cooperet.com murata www.murata.com this simple design guide will not always result in the optimum inductor selection for a given application. as a general rule, lower output voltages and higher switching frequency will require smaller inductor values. if the ap- plication requires less than 750ma load current, then a lesser inductor value may be acceptable. this allows use of a physically smaller inductor, or one with a lower dcr resulting in higher effciency. there are several graphs in the typical performance characteristics section of this data
lt3973/lt3973-3.3/lt3973-5 14 3973fa a pplica t ions i n f orma t ion sheet that show the maximum load current as a function of input voltage for several popular output voltages. low inductance may result in discontinuous mode operation, which is acceptable but reduces maximum load current. for details of maximum output current and discontinu- ous mode operation, see application note 44. finally, for duty cycles greater than 50% (v out /v in > 0.5), there is a minimum inductance required to avoid subharmonic oscillations. see application note 19. input capacitor bypass the input of the lt3973 circuit with a ceramic capaci - tor of x7r or x5r type. y5v types have poor performance over temperature and applied voltage, and should not be used. a 4.7f ceramic capacitor is adequate to bypass the lt3973 and will easily handle the ripple current. note that larger input capacitance is required when a lower switching frequency is used (due to longer on-times). if the input power source has high impedance, or there is signifcant inductance due to long wires or cables, additional bulk capacitance may be necessary. this can be provided with a low performance electrolytic capacitor. step-down regulators draw current from the input sup- ply in pulses with very fast rise and fall times. the input capacitor is required to reduce the resulting voltage ripple at the lt3973 and to force this very high frequency switching current into a tight local loop, minimizing emi. a 4.7f capacitor is capable of this task, but only if it is placed close to the lt3973 (see the pcb layout section). a second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the lt3973. a ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. if the lt3973 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, pos - sibly exceeding the lt3973s voltage rating. this situation is easily avoided (see the hot plugging safely section). output capacitor and output ripple the output capacitor has two essential functions. it stores energy in order to satisfy transient loads and stabilize the lt3973s control loop. ceramic capacitors have very low equivalent series resistance (esr) and provide the best ripple performance. a good starting value is: c out = 50 v out ? f sw where f sw is in mhz and c out is the recommended output capacitance in f. use x5r or x7r types. this choice will provide low output ripple and good transient response. transient performance can be improved with a higher value capacitor if combined with a phase lead capacitor (typically 15pf) between the output and the feedback pin. a lower value of output capacitor can be used to save space and cost but transient performance will suffer. the second function is that the output capacitor, along with the inductor, flters the square wave generated by the lt3973 to produce the dc output. in this role it determines the output ripple, so low impedance (at the switching frequency) is important. the output ripple decreases with increasing output capacitance, down to approximately 1mv. see figure 1. note that a larger phase lead capacitor should be used with a large output capacitor. figure 1. worst-case output ripple across full load range when choosing a capacitor, look carefully through the data sheet to fnd out what the actual capacitance is under operating conditions (applied voltage and temperature). a physically larger capacitor or one with a higher voltage rating may be required. table 3 lists several capacitor vendors. c out (f) 0 0 worst-case output ripple (mv) 2 6 8 10 40 80 100 16 3973 f01 4 20 60 12 14 front page application v in = 24v v in = 12v
lt3973/lt3973-3.3/lt3973-5 15 3973fa a pplica t ions i n f orma t ion figure 2. burst mode operation figure 3. switching frequency in burst mode operation table 3. recommended ceramic capacitor vendors manufacturer website avx www.avxcorp.com murata www.murata.com taiyo yuden www.t-yuden.com vishay siliconix www.vishay.com tdk www.tdk.com ceramic capacitors ceramic capacitors are small, robust and have very low esr. however, ceramic capacitors can cause problems when used with the lt3973 due to their piezoelectric nature. when in burst mode operation, the lt3973s switching frequency depends on the load current, and at very light loads the lt3973 can excite the ceramic capacitor at audio frequencies, generating audible noise. since the lt3973 operates at a lower current limit during burst mode op- eration, the noise is typically very quiet to a casual ear. if this is unacceptable, use a high performance tantalum or electrolytic capacitor at the output. a fnal precaution regarding ceramic capacitors concerns the maximum input voltage rating of the lt3973. as pre - viously mentioned, a ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. if the lt3973 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the lt3973s rating. this situation is easily avoided (see the hot plugging safely section). low ripple burst mode operation to enhance effciency at light loads, the lt3973 operates in low ripple burst mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. during burst mode opera- tion, the lt3973 delivers single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capaci- tor. because the lt3973 delivers power to the output with single, low current pulses, the output ripple is kept below 10mv for a typical application. see figure 2. as the load current decreases towards a no load condition, the percentage of time that the lt3973 operates in sleep mode increases and the average input current is greatly reduced resulting in high effciency even at very low loads. note that during burst mode operation, the switching frequency will be lower than the programmed switching frequency. see figure 3. at higher output loads (above 90ma for the front page application) the lt3973 will be running at the frequency programmed by the r t resistor, and will be operating in standard pwm mode. the transition between pwm and low ripple burst mode is seamless, and will not disturb the output voltage. v out 10mv/div v sw 5v/div i l 200ma/div 5s/div front page application v in = 12v v out = 5v i load = 15ma f = 600khz 3973 f02 boost and bd pin considerations capacitor c3 and the internal boost schottky diode (see the block diagram) are used to generate a boost voltage that is higher than the input voltage. in most cases a 0.47f capacitor will work well. figure 4 shows two ways to arrange the boost circuit. the boost pin must be more load current (ma) 0 0 switching frequency (khz) 100 300 400 500 300 500 600 700 700 3973 f03 200 100 200 400 600 front page application
lt3973/lt3973-3.3/lt3973-5 16 3973fa figure 4. two circuits for generating the boost voltage figure 5. the minimum input voltage depends on output voltage, load current and boost circuit than 1.9v above the sw pin for best effciency. for out - puts of 2.2v and above, the standard circuit (figure 4a) is best. for outputs between 2.2v and 2.5v, use a 1f boost capacitor. for output voltages below 2.2v, the boost diode can be tied to the input (figure 4b), or to another external supply greater than 2.2v. however, the circuit in figure 4a is more effcient because the boost pin current and bd pin quiescent current come from a lower voltage source. you must also be sure that the maximum voltage ratings of the boost and bd pins are not exceeded. a pplica t ions i n f orma t ion bd lt3973 (4a) for v out 2.2v boost v in v in c3 v out sw gnd bd lt3973 (4b) for v out < 2.2v; v in < 25v boost v in v in c3 3973 f04 v out sw gnd minimum dropout voltage when the out pin is tied to v out , the lt3973 regulates the output such that: v in C v out > v dropout(min) where v dropout(min) is 530mv. this enforced minimum dropout voltage keeps the boost capacitor charged regard- less of load during dropout conditions. the lt3973 achieves this by limiting the duty cycle and forcing the switch to turn off regularly to charge the boost capacitor. since suffcient voltage across the boost capacitor is maintained, the switch is allowed to fully saturate and the internal switch drop stays low for good dropout performance. figure 6 shows the overall v in to v out performance during start-up and dropout conditions. the lt3973 monitors the boost capacitor for suffcient voltage such that the switch is allowed to fully saturate. during start-up conditions when the boost capacitor may not be fully charged, the switch will operate with about 1v of drop, and an internal current source will begin to pull 70ma (typical) from the out pin which is typically connected to v out . this current forces the lt3973 to switch more often and with more inductor current, which recharges the boost capacitor. when the boost capacitor is suffciently charged, the current source turns off, and the part may enter burst mode. see figure 5 for minimum input voltage for outputs of 3.3v and 5v. load current (ma) 0 100 2.5 input voltage (v) 3.5 5.0 200 400 500 3.0 4.5 4.0 300 600 700 to start/to run front page application v out = 3.3v load current (ma) 0 100 4.0 input voltage (v) 5.0 6.5 200 400 500 3973 f05 4.5 6.0 5.5 300 600 700 to start/to run front page application v out = 5v
lt3973/lt3973-3.3/lt3973-5 17 3973fa a pplica t ions i n f orma t ion during dropout conditions when the output is below regula- tion, the output ripple may increase. at very high loads, this ripple can increase to approximately 200mv for the front page application. if lower output ripple is desired during such conditions, a larger output capacitor can be used. in order to not exceed the maximum voltage rating, tie the out pin to gnd for programmed outputs greater than 14v. note that this will result in degraded start-up and dropout performance. time voltage (v) 6 7 9 8 5 3973 f06 4 3 2 1 0 front page application v in v out figure 6. v in to v out performance v uvlo = r3 + r4 r4 ? 1.19v where switching should not start until v in is above v uvlo . note that due to the comparators hysteresis, switching will not stop until the input falls slightly below v uvlo . undervoltage lockout is functional only when v uvlo is greater than 5.5v. + ? 1.19v shdn 3973 f07 lt3973 en/uvlo v in v in r3 r4 figure 7. undervoltage lockout shorted and reversed input protection if the inductor is chosen so that it wont saturate excessively, a lt3973 buck regulator will tolerate a shorted output. there is another situation to consider in systems where the output will be held high when the input to the lt3973 is absent. this may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode ored with the lt3973s output. if the v in pin is allowed to foat and the en/uvlo pin is held high (either by a logic signal or because it is tied to v in ), then the lt3973s internal circuitry will pull its quiescent current through its sw pin. this is fne if the system can tolerate a few a in this state. figure 8. diode d4 prevents a shorted input from discharging a backup battery tied to the output. it also protects the circuit from a reversed input. the lt3973 runs only when the input is present bd lt3973 boost v in en/uvlo v in v out backup 3973 f08 sw d4 fb gnd + enable and undervoltage lockout the lt3973 is in shutdown when the en/uvlo pin is low and active when the pin is high. the rising threshold of the en/uvlo comparator is 1.19v, with a 30mv hysteresis. this threshold is accurate when v in is above 4.2v. if v in is lower than 4.2v, tie en/uvlo pin to gnd to place the part in shutdown. figure 7 shows how to add undervoltage lockout (uvlo) to the lt3973. typically, uvlo is used in situations where the input supply is current limited, or has a relatively high source resistance. a switching regulator draws constant power from the source, so source current increases as source voltage drops. this looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. uvlo prevents the regulator from operating at source voltages where the problems might occur. the uvlo threshold can be adjusted by setting the values r3 and r4 such that they satisfy the following equation:
lt3973/lt3973-3.3/lt3973-5 18 3973fa figure 9. a good pcb layout ensures proper, low emi operation if the en/uvlo pin is grounded, the sw pin current will drop to 0.75a. however, if the v in pin is grounded while the output is held high, regardless of en/uvlo, parasitic diodes inside the lt3973 can pull current from the output through the sw pin and the v in pin. figure 8 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout. figure 9 shows the rec - ommended component placement with trace, ground plane and via locations. note that large, switched currents fow in the lt3973s v in and sw pins, the internal catch diode and the input capacitor. the loop formed by these components should be as small as possible. these components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. place a local, unbroken ground plane below these components. the sw and boost nodes should be as small as possible. finally, keep the fb nodes small so that the ground traces will shield them from the sw and boost nodes. the exposed pad on the bottom must be soldered to ground so that the pad acts as a heat sink. to keep thermal resistance low, extend the ground plane as much as possible, and add thermal vias under and near the lt3973 to additional ground planes within the circuit board and on the bottom side. hot plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of lt3973 circuits. however, these ca - pacitors can cause problems if the lt3973 is plugged into a live supply. the low loss ceramic capacitor, combined with stray inductance in series with the power source, forms an under damped tank circuit, and the voltage at the v in pin of the lt3973 can ring to twice the nominal input voltage, possibly exceeding the lt3973s rating and damaging the part. if the input supply is poorly controlled or the user will be plugging the lt3973 into an energized supply, the input network should be designed to prevent this overshoot. see application note 88 for a complete discussion. a pplica t ions i n f orma t ion 6 8 7 9 10 5 4 2 3 1 vias to local ground plane vias to v out en/uvlo gnd gnd pg v out gnd v in 3973 f09 high temperature considerations for higher ambient temperatures, care should be taken in the layout of the pcb to ensure good heat sinking of the lt3973. the exposed pad on the bottom must be soldered to a ground plane. this ground should be tied to large copper layers below with thermal vias; these layers will spread the heat dissipated by the lt3973. placing additional vias can reduce thermal resistance further. the maximum load current should be derated as the ambient temperature approaches the maximum junction rating. power dissipation within the lt3973 can be estimated by calculating the total power loss from an effciency measure- ment and subtracting inductor loss. the die temperature is calculated by multiplying the lt3973 power dissipation by the thermal resistance from junction to ambient. finally, be aware that at high ambient temperatures the internal schottky diode will have signifcant leakage cur - rent (see the typical performance characteristics section) increasing the quiescent current of the lt3973 converter. other linear technology publications application notes 19, 35 and 44 contain more detailed descriptions and design information for buck regulators and other switching regulators. the lt1376 data sheet has a more extensive discussion of output ripple, loop compensation and stability testing. design note 100 shows how to generate a bipolar output supply using a buck regulator.
lt3973/lt3973-3.3/lt3973-5 19 3973fa 12v step-down converter 5v, 2mhz step-down converter t ypical applica t ions 3.3v step-down converter 5v step-down converter 2.5v step-down converter 1.8v step-down converter 3.3v step-down converter 5v step-down converter v in boost lt3973 sw en/uvlo pg rt c3 0.47f 15pf c2 22f c1 4.7f v in 4.2v to 42v v out 3.3v 750ma 1m 576k 215k f = 600khz l1 15h bd out fb gnd off on 3973 ta02 v in boost lt3973 sw en/uvlo pg rt c3 0.47f 15pf 215k f = 600khz c2 22f c1 4.7f v in 5.6v to 42v v out 5v 750ma r1 1m r2 316k l1 15h bd out fb gnd off on 3973 ta03 v in boost lt3973-3.3 sw en/uvlo pg rt c3 0.47f 215k f = 600khz c2 22f c1 4.7f v in 4.2v to 42v v out 3.3v 750ma l1 15h bd out v out gnd off on 3973 ta04 v in boost lt3973-5 sw en/uvlo pg rt c3 0.47f 215k f = 600khz c2 22f c1 4.7f v in 5.6v to 42v v out 5v 750ma l1 15h bd out v out gnd off on 3973 ta05 v in boost lt3973 sw en/uvlo pg rt c3 1f 22pf 215k f = 600khz c2 47f c1 4.7f v in 4.2v to 42v v out 2.5v 750ma r1 1m r2 931k l1 10h bd out fb gnd off on 3973 ta06 v in boost lt3973 sw out en/uvlo bd pg rt c3 0.47f 22pf 215k f = 600khz c2 47f c1 4.7f v in 4.2v to 25v v out 1.8v 750ma r1 487k r2 1m l1 10h fb gnd off on 3973 ta07 v in boost lt3973 sw en/ulvo pg rt c3 0.47f 15pf 215k f = 600khz c2 22f c1 4.7f v in 12.6v to 42v v out 12v 750ma r1 1m r2 113k l1 22h bd out fb gnd off on 3973 ta08 v in boost lt3973 sw en/uvlo pg rt 43.2k f = 2mhz c3 0.47f 10pf c2 10f c1 2.2f v in 5.6v to 28v transients to 42v v out 5v 750ma r1 1m r2 316k l1 10h bd out fb gnd off on 3973 ta09
lt3973/lt3973-3.3/lt3973-5 20 3973fa t ypical applica t ions input current during start-up start-up from high impedance input source 5v step-down converter with undervoltage lockout v in boost lt3973 sw en/uvlo pg rt 0.47f 15pf 22f 4.7f v in 6v to 42v v out 5v 750ma 1m 316k 215k 3.9m k f = 600khz 15h bd out fb gnd 3973 ta10a 976k + ? input voltage (v) 0 ?10 input current (ma) 20 2 4 6 8 3973 ta10b 10 40 60 0 10 30 50 12 input current dropout conditions front page application with uvlo programmed to 6v front page application v out 2v/div v in 5v/div 5ms/div front page application v in = 12v v out = 5v 1k input source resistance 2.5ma load 3973 ta10c uvlo programmed to 6v
lt3973/lt3973-3.3/lt3973-5 21 3973fa p ackage descrip t ion dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699 rev c) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the ltc website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 ? 0.05 (dd) dfn rev c 0310 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.70 0.05 3.55 0.05 package outline 0.25 0.05 0.50 bsc dd package 10-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1699 rev c) pin 1 notch r = 0.20 or 0.35 45 chamfer
lt3973/lt3973-3.3/lt3973-5 22 3973fa p ackage descrip t ion mse package 10-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1664 rev h) please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. msop (mse) 0911 rev h 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 ?0.27 (.007 ? .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 1 2 3 4 5 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 8910 10 1 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 6. exposed pad dimension does include mold flash. mold flash on e-pad shall not exceed 0.254mm (.010") per side. 0.254 (.010) 0 ? 6 typ detail ?a? detail ?a? gauge plane 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 1.68 0.102 (.066 .004) 1.88 0.102 (.074 .004) 0.50 (.0197) bsc 0.305 0.038 (.0120 .0015) typ bottom view of exposed pad option 1.68 (.066) 1.88 (.074) 0.1016 0.0508 (.004 .002) detail ?b? detail ?b? corner tail is part of the leadframe feature. for reference only no measurement purpose 0.05 ref 0.29 ref mse package 10-lead plastic msop, exposed die pad (reference ltc dwg # 05-08-1664 rev h)
lt3973/lt3973-3.3/lt3973-5 23 3973fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h is t ory rev date description page number a 4/12 title and features modifed to include fxed output versions. absolute maximum ratings, pin confguration, and order information sections modifed to include fxed output versions. electrical characteristics table modifed to include fxed output versions. graphs modifed to include fxed output versions. pin functions and block diagram modifed to include fxed output versions. applications for fxed output versions added. 1 2 3 5 9, 10 19
lt3973/lt3973-3.3/lt3973-5 24 3973fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2011 lt 0412 rev a ? printed in usa r ela t e d p ar t s part number description comments lt3970/lt3970-3.3/ lt3970-5 40v, 350ma, 2.2mhz high effciency micropower step-down dc/dc converter with i q = 2.5a v in = 4.2v to 40v, v out(min) = 1.21v, i q = 2.5a, i sd < 1a, 3mm 2mm dfn-10, msop-10 LT3990 62v, 350ma, 2.2mhz high effciency micropower step-down dc/dc converter with i q = 2.5a v in = 4.2v to 62v, v out(min) = 1.21v, i q = 2.5a, i sd < 1a, 3mm 3mm dfn-16, msop-16e lt3971 38v, 1.2a, 2.2mhz high effciency micropower step-down dc/dc converter with i q = 2.8a v in = 4.3v to 38v, v out(min) = 1.2v, i q = 2.8a, i sd < 1a, 3mm 3mm dfn-10, msope-10 lt3991 55v, 1.2a, 2.2mhz high effciency micropower step-down dc/dc converter with i q = 2.8a v in = 4.3v to 55v, v out(min) = 1.2v, i q = 2.8a, i sd < 1a, 3mm 3mm dfn-10, msope-10 lt3682 36v, 60v max , 1a, 2.2mhz high effciency micropower step-down dc/dc converter v in = 3.6v to 36v, v out(min) = 0.8v, i q = 75a, i sd < 1a, 3mm 3mm dfn-12 t ypical applica t ion 1.21v step-down converter v in boost lt3973 sw en/uvlo bd pg rt c3 0.47f c2 47f c1 4.7f v in 4.2v to 25v v out 1.21v 750ma 340k f = 400khz l1 10h fb out gnd off on 3973 ta10

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